# 顶尖应届-模拟芯片设计工程师（模拟AI）-芯片

External opening: you cannot apply through AI Native Match; apply on the official site.

Apply through the official channel. The full external receipt stays in your workspace. When signed in, three minimal event types explicitly recorded through the CLI are reported by default: selection, self-reported application and channel observation. Browsing or saving a role does not report an event; external applications do not appear under My applications.

- Company: 小米 (Stage unknown)
- Locations: 上海
- Role: Engineering
- Apply on the official site: https://xiaomi.jobs.f.mioffice.cn/toptalent/position/7661962099633178906/detail

## Role description from source

1. AI+EDA工具链整合:调研并集成主流EDA工具(Cadence/Synopsys)与AI Agent框架，搭建自动化仿真-优化闭环流程；
2.电路自动优化设计:针对LDO、DCO、ADC/DAC等模拟IP，开发参数自动扫描、性能指标自动评估与优化算法，实现设计收敛效率提升；
3.知识库建设:将设计评审、仿真数据、流片经验、测试结果等结构化沉淀，构建可检索、可复用的设计知识库；
4.方法学探索:跟踪AI辅助电路设计前沿(LLM for EDA、生成式设计等)，输出方法论与工具原型；
5. 跨团队协作:与设计、验证、测试团队协同，推动AI工具在实际项目中落地验证。
任职要求
1.博士&研究生，电子科学与技术/微电子/集成电路等相关专业；
2.扎实的模拟/混合信号电路设计基础，熟悉LDO/DC-DC/ADC/DAC/PLL等至少一类模块的设计方法；
3.熟练使用Cadence Virtuoso、Spectre、Calibre等主流EDA工具；
4.精通Python/MATLAB，有脚本自动化或机器学习框架使用经验；
5.了解LLM/AI Agent基本原理，对AI辅助EDA有浓厚兴趣，有相关项目经验者优先；
6.有流片经验优先，发表过模拟IC设计或AI for EDA相关顶会论文者优先。
接口顶部原始条件（未做资格推断）
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opening_id: 042df2a0-c80d-44d2-b870-2d20f941d5fa

`anm openings save --id 042df2a0-c80d-44d2-b870-2d20f941d5fa`